Enum
VkAccessFlagBits2
Access flags for VkAccessFlags2
Bits which can be set in the srcAccessMask
and dstAccessMask
members of VkMemoryBarrier2KHR, VkImageMemoryBarrier2KHR, and
VkBufferMemoryBarrier2KHR, specifying access behavior, are:
typedef enum VkAccessFlagBits2 {
VK_ACCESS_2_NONE = 0,
VK_ACCESS_2_NONE_KHR = VK_ACCESS_2_NONE,
VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT = 0x00000001ULL,
VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT_KHR = VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT,
VK_ACCESS_2_INDEX_READ_BIT = 0x00000002ULL,
VK_ACCESS_2_INDEX_READ_BIT_KHR = VK_ACCESS_2_INDEX_READ_BIT,
VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT = 0x00000004ULL,
VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT_KHR = VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT,
VK_ACCESS_2_UNIFORM_READ_BIT = 0x00000008ULL,
VK_ACCESS_2_UNIFORM_READ_BIT_KHR = VK_ACCESS_2_UNIFORM_READ_BIT,
VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT = 0x00000010ULL,
VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT_KHR = VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT,
VK_ACCESS_2_SHADER_READ_BIT = 0x00000020ULL,
VK_ACCESS_2_SHADER_READ_BIT_KHR = VK_ACCESS_2_SHADER_READ_BIT,
VK_ACCESS_2_SHADER_WRITE_BIT = 0x00000040ULL,
VK_ACCESS_2_SHADER_WRITE_BIT_KHR = VK_ACCESS_2_SHADER_WRITE_BIT,
VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT = 0x00000080ULL,
VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT_KHR = VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT,
VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT = 0x00000100ULL,
VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT_KHR = VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT,
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT = 0x00000200ULL,
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT_KHR = VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT,
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT = 0x00000400ULL,
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT_KHR = VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,
VK_ACCESS_2_TRANSFER_READ_BIT = 0x00000800ULL,
VK_ACCESS_2_TRANSFER_READ_BIT_KHR = VK_ACCESS_2_TRANSFER_READ_BIT,
VK_ACCESS_2_TRANSFER_WRITE_BIT = 0x00001000ULL,
VK_ACCESS_2_TRANSFER_WRITE_BIT_KHR = VK_ACCESS_2_TRANSFER_WRITE_BIT,
VK_ACCESS_2_HOST_READ_BIT = 0x00002000ULL,
VK_ACCESS_2_HOST_READ_BIT_KHR = VK_ACCESS_2_HOST_READ_BIT,
VK_ACCESS_2_HOST_WRITE_BIT = 0x00004000ULL,
VK_ACCESS_2_HOST_WRITE_BIT_KHR = VK_ACCESS_2_HOST_WRITE_BIT,
VK_ACCESS_2_MEMORY_READ_BIT = 0x00008000ULL,
VK_ACCESS_2_MEMORY_READ_BIT_KHR = VK_ACCESS_2_MEMORY_READ_BIT,
VK_ACCESS_2_MEMORY_WRITE_BIT = 0x00010000ULL,
VK_ACCESS_2_MEMORY_WRITE_BIT_KHR = VK_ACCESS_2_MEMORY_WRITE_BIT,
// bitpos 17-31 are specified by extensions to the original VkAccessFlagBits enum,
VK_ACCESS_2_SHADER_SAMPLED_READ_BIT = 0x100000000ULL,
VK_ACCESS_2_SHADER_SAMPLED_READ_BIT_KHR = VK_ACCESS_2_SHADER_SAMPLED_READ_BIT,
VK_ACCESS_2_SHADER_STORAGE_READ_BIT = 0x200000000ULL,
VK_ACCESS_2_SHADER_STORAGE_READ_BIT_KHR = VK_ACCESS_2_SHADER_STORAGE_READ_BIT,
VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT = 0x400000000ULL,
VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT_KHR = VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT,
} VkAccessFlagBits2;
or the equivalent
#define VkAccessFlagBits2KHR VkAccessFlagBits2
VK_ACCESS_2_NONE
specifies no accesses.VK_ACCESS_2_MEMORY_READ_BIT
specifies all read accesses. It is always valid in any access mask, and is treated as equivalent to setting allREAD
access flags that are valid where it is used.VK_ACCESS_2_MEMORY_WRITE_BIT
specifies all write accesses. It is always valid in any access mask, and is treated as equivalent to setting allWRITE
access flags that are valid where it is used.VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT
specifies read access to command data read from indirect buffers as part of an indirect build, trace, drawing or dispatch command. Such access occurs in theVK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT
pipeline stage.VK_ACCESS_2_INDEX_READ_BIT
specifies read access to an index buffer as part of an indexed drawing command, bound by vkCmdBindIndexBuffer2KHR and vkCmdBindIndexBuffer. Such access occurs in theVK_PIPELINE_STAGE_2_INDEX_INPUT_BIT
pipeline stage.VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT
specifies read access to a vertex buffer as part of a drawing command, bound by vkCmdBindVertexBuffers. Such access occurs in theVK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT
pipeline stage.VK_ACCESS_2_UNIFORM_READ_BIT
specifies read access to a uniform buffer in any shader pipeline stage.VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT
specifies read access to an input attachment within a render pass during subpass shading or fragment shading. Such access occurs in theVK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI
orVK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT
pipeline stage.VK_ACCESS_2_SHADER_SAMPLED_READ_BIT
specifies read access to a uniform texel buffer or sampled image in any shader pipeline stage.VK_ACCESS_2_SHADER_STORAGE_READ_BIT
specifies read access to a storage buffer, physical storage buffer, storage texel buffer, or storage image in any shader pipeline stage.VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR
specifies read access to a shader binding table in any shader pipeline stage.VK_ACCESS_2_SHADER_READ_BIT
is equivalent to the logical OR of:VK_ACCESS_2_SHADER_SAMPLED_READ_BIT
VK_ACCESS_2_SHADER_STORAGE_READ_BIT
VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT
specifies write access to a storage buffer, physical storage buffer, storage texel buffer, or storage image in any shader pipeline stage.VK_ACCESS_2_SHADER_WRITE_BIT
is equivalent toVK_ACCESS_2_SHADER_STORAGE_WRITE_BIT
.VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT
specifies read access to a color attachment, such as via blending (other than advanced blend operations), logic operations or certain render pass load operations in theVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
pipeline stage or via fragment shader tile image reads in theVK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT
pipeline stage.VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT
specifies write access to a color attachment during a render pass or via certain render pass load, store, and multisample resolve operations. Such access occurs in theVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
pipeline stage.VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT
specifies read access to a depth/stencil attachment, via depth or stencil operations or certain render pass load operations in theVK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT
orVK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT
pipeline stages or via fragment shader tile image reads in theVK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT
pipeline stage.VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT
specifies write access to a depth/stencil attachment, via depth or stencil operations or certain render pass load and store operations. Such access occurs in theVK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT
orVK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT
pipeline stages.VK_ACCESS_2_TRANSFER_READ_BIT
specifies read access to an image or buffer in a copy operation. Such access occurs in theVK_PIPELINE_STAGE_2_COPY_BIT
,VK_PIPELINE_STAGE_2_BLIT_BIT
, orVK_PIPELINE_STAGE_2_RESOLVE_BIT
pipeline stages.VK_ACCESS_2_TRANSFER_WRITE_BIT
specifies write access to an image or buffer in a clear or copy operation. Such access occurs in theVK_PIPELINE_STAGE_2_COPY_BIT
,VK_PIPELINE_STAGE_2_BLIT_BIT
,VK_PIPELINE_STAGE_2_CLEAR_BIT
, orVK_PIPELINE_STAGE_2_RESOLVE_BIT
pipeline stages.VK_ACCESS_2_HOST_READ_BIT
specifies read access by a host operation. Accesses of this type are not performed through a resource, but directly on memory. Such access occurs in theVK_PIPELINE_STAGE_2_HOST_BIT
pipeline stage.VK_ACCESS_2_HOST_WRITE_BIT
specifies write access by a host operation. Accesses of this type are not performed through a resource, but directly on memory. Such access occurs in theVK_PIPELINE_STAGE_2_HOST_BIT
pipeline stage.VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT
specifies read access to a predicate as part of conditional rendering. Such access occurs in theVK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT
pipeline stage.VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT
specifies write access to a transform feedback buffer made when transform feedback is active. Such access occurs in theVK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT
pipeline stage.VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT
specifies read access to a transform feedback counter buffer which is read when vkCmdBeginTransformFeedbackEXT executes. Such access occurs in theVK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT
pipeline stage.VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT
specifies write access to a transform feedback counter buffer which is written when vkCmdEndTransformFeedbackEXT executes. Such access occurs in theVK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT
pipeline stage.VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV
specifies reads from buffer inputs to vkCmdPreprocessGeneratedCommandsNV. Such access occurs in theVK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV
pipeline stage.VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV
specifies writes to the target command buffer preprocess outputs. Such access occurs in theVK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV
pipeline stage.VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_EXT
specifies reads from buffer inputs to vkCmdPreprocessGeneratedCommandsEXT. Such access occurs in theVK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_EXT
pipeline stage.VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_EXT
specifies writes to the target command buffer preprocess outputs. Such access occurs in theVK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_EXT
pipeline stage.VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT
specifies read access to color attachments, including advanced blend operations. Such access occurs in theVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
pipeline stage.VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI
specifies read access to an invocation mask image in theVK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI
pipeline stage.VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR
specifies read access to an acceleration structure as part of a trace, build, or copy command, or to an acceleration structure scratch buffer as part of a build command. Such access occurs in theVK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
pipeline stage orVK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR
pipeline stage.VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR
specifies write access to an acceleration structure or acceleration structure scratch buffer as part of a build or copy command. Such access occurs in theVK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR
pipeline stage.VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT
specifies read access to a fragment density map attachment during dynamic fragment density map operations. Such access occurs in theVK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT
pipeline stage.VK_ACCESS_2_FRAGMENT_SHADING_RATE_ATTACHMENT_READ_BIT_KHR
specifies read access to a fragment shading rate attachment during rasterization. Such access occurs in theVK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR
pipeline stage.VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV
specifies read access to a shading rate image during rasterization. Such access occurs in theVK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV
pipeline stage. It is equivalent toVK_ACCESS_2_FRAGMENT_SHADING_RATE_ATTACHMENT_READ_BIT_KHR
.VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR
specifies read access to an image or buffer resource in a video decode operation. Such access occurs in theVK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR
pipeline stage.VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR
specifies write access to an image or buffer resource in a video decode operation. Such access occurs in theVK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR
pipeline stage.VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR
specifies read access to an image or buffer resource in a video encode operation. Such access occurs in theVK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR
pipeline stage.VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR
specifies write access to an image or buffer resource in a video encode operation. Such access occurs in theVK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR
pipeline stage.VK_ACCESS_2_DESCRIPTOR_BUFFER_READ_BIT_EXT
specifies read access to a descriptor buffer in any shader pipeline stage.VK_ACCESS_2_OPTICAL_FLOW_READ_BIT_NV
specifies read access to an image or buffer resource as part of a optical flow operation. Such access occurs in theVK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV
pipeline stage.VK_ACCESS_2_OPTICAL_FLOW_WRITE_BIT_NV
specifies write access to an image or buffer resource as part of a optical flow operation. Such access occurs in theVK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV
pipeline stage.VK_ACCESS_2_MICROMAP_WRITE_BIT_EXT
specifies write access to a micromap object. Such access occurs in theVK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT
pipeline stage.VK_ACCESS_2_MICROMAP_READ_BIT_EXT
specifies read access to a micromap object. Such access occurs in theVK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT
andVK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR
pipeline stages.
In situations where an application wishes to select all access types for a
given set of pipeline stages, VK_ACCESS_2_MEMORY_READ_BIT
or
VK_ACCESS_2_MEMORY_WRITE_BIT
can be used.
This is particularly useful when specifying stages that only have a single
access type.
The VkAccessFlags2
bitmask goes beyond the 31 individual bit flags
allowable within a C99 enum, which is how VkAccessFlagBits is defined.
The first 31 values are common to both, and are interchangeable.