VkBufferMemoryBarrier2
The VkBufferMemoryBarrier2 structure is defined as:
typedef struct VkBufferMemoryBarrier2 {
VkStructureType sType;
const void* pNext;
VkPipelineStageFlags2 srcStageMask;
VkAccessFlags2 srcAccessMask;
VkPipelineStageFlags2 dstStageMask;
VkAccessFlags2 dstAccessMask;
uint32_t srcQueueFamilyIndex;
uint32_t dstQueueFamilyIndex;
VkBuffer buffer;
VkDeviceSize offset;
VkDeviceSize size;
} VkBufferMemoryBarrier2;
or the equivalent
typedef VkBufferMemoryBarrier2 VkBufferMemoryBarrier2KHR;
sTypeis a VkStructureType value identifying this structure.pNextisNULLor a pointer to a structure extending this structure.srcStageMaskis a VkPipelineStageFlags2 mask of pipeline stages to be included in the first synchronization scope.srcAccessMaskis a VkAccessFlags2 mask of access flags to be included in the first access scope.dstStageMaskis a VkPipelineStageFlags2 mask of pipeline stages to be included in the second synchronization scope.dstAccessMaskis a VkAccessFlags2 mask of access flags to be included in the second access scope.srcQueueFamilyIndexis the source queue family for a queue family ownership transfer.dstQueueFamilyIndexis the destination queue family for a queue family ownership transfer.bufferis a handle to the buffer whose backing memory is affected by the barrier.offsetis an offset in bytes into the backing memory forbuffer; this is relative to the base offset as bound to the buffer (see vkBindBufferMemory).sizeis a size in bytes of the affected area of backing memory forbuffer, orVK_WHOLE_SIZEto use the range fromoffsetto the end of the buffer.
This structure defines a memory dependency limited to a range of a buffer, and can define a queue family ownership transfer operation for that range.
The first synchronization scope and
access scope described by
this structure include only operations and memory accesses specified by
srcStageMask and srcAccessMask.
The second synchronization scope
and access scope described
by this structure include only operations and memory accesses specified by
dstStageMask and dstAccessMask.
Both access scopes are
limited to only memory accesses to buffer in the range defined by
offset and size.
If buffer was created with VK_SHARING_MODE_EXCLUSIVE, and
srcQueueFamilyIndex is not equal to dstQueueFamilyIndex, this
memory barrier defines a queue family
ownership transfer operation.
When executed on a queue in the family identified by
srcQueueFamilyIndex, this barrier defines a
queue family release operation
for the specified buffer range, and the second synchronization scope does
not apply to this operation.
When executed on a queue in the family identified by
dstQueueFamilyIndex, this barrier defines a
queue family acquire operation
for the specified buffer range, and the first synchronization scope does not
apply to this operation.
A queue family ownership transfer
operation is also defined if the values are not equal, and either is one
of the special queue family values reserved for external memory ownership
transfers, as described in Queue Family Ownership Transfer.
A queue family release
operation is defined when dstQueueFamilyIndex is one of those
values, and a queue family
acquire operation is defined when srcQueueFamilyIndex is one of
those values.
Valid Usage
VUID-VkBufferMemoryBarrier2-srcStageMask-03929
If the geometryShader feature is not
enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT
VUID-VkBufferMemoryBarrier2-srcStageMask-03930
If the tessellationShader feature
is not enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT or
VK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT
VUID-VkBufferMemoryBarrier2-srcStageMask-03931
If the conditionalRendering
feature is not enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT
VUID-VkBufferMemoryBarrier2-srcStageMask-03932
If the fragmentDensityMap feature
is not enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT
VUID-VkBufferMemoryBarrier2-srcStageMask-03933
If the transformFeedback feature
is not enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT
VUID-VkBufferMemoryBarrier2-srcStageMask-03934
If the meshShader feature is not enabled,
srcStageMask must not contain
VK_PIPELINE_STAGE_2_MESH_SHADER_BIT_EXT
VUID-VkBufferMemoryBarrier2-srcStageMask-03935
If the taskShader feature is not enabled,
srcStageMask must not contain
VK_PIPELINE_STAGE_2_TASK_SHADER_BIT_EXT
VUID-VkBufferMemoryBarrier2-srcStageMask-07316
If neither the shadingRateImage or
attachmentFragmentShadingRate are enabled, srcStageMaskmust not contain
VK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR
VUID-VkBufferMemoryBarrier2-srcStageMask-04957
If the subpassShading feature is not
enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI
VUID-VkBufferMemoryBarrier2-srcStageMask-04995
If the invocationMask feature is not
enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI
VUID-VkBufferMemoryBarrier2-srcStageMask-07946
If neither the VK_NV_ray_tracing extension or
rayTracingPipeline feature are
enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkBufferMemoryBarrier2-srcAccessMask-03900
If srcAccessMask includes
VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03901
If srcAccessMask includes VK_ACCESS_2_INDEX_READ_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03902
If srcAccessMask includes
VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT,
VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03903
If srcAccessMask includes
VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT,
VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03904
If srcAccessMask includes VK_ACCESS_2_UNIFORM_READ_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-srcAccessMask-03905
If srcAccessMask includes
VK_ACCESS_2_SHADER_SAMPLED_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-srcAccessMask-03906
If srcAccessMask includes
VK_ACCESS_2_SHADER_STORAGE_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-srcAccessMask-03907
If srcAccessMask includes
VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-srcAccessMask-07454
If srcAccessMask includes VK_ACCESS_2_SHADER_READ_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT,
or one of the VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-srcAccessMask-03909
If srcAccessMask includes VK_ACCESS_2_SHADER_WRITE_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-srcAccessMask-03910
If srcAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03911
If srcAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT, srcStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03912
If srcAccessMask includes
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03913
If srcAccessMask includes
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03914
If srcAccessMask includes VK_ACCESS_2_TRANSFER_READ_BIT,
srcStageMask must include VK_PIPELINE_STAGE_2_COPY_BIT,
VK_PIPELINE_STAGE_2_BLIT_BIT,
VK_PIPELINE_STAGE_2_RESOLVE_BIT,
VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03915
If srcAccessMask includes VK_ACCESS_2_TRANSFER_WRITE_BIT,
srcStageMask must include VK_PIPELINE_STAGE_2_COPY_BIT,
VK_PIPELINE_STAGE_2_BLIT_BIT,
VK_PIPELINE_STAGE_2_RESOLVE_BIT,
VK_PIPELINE_STAGE_2_CLEAR_BIT,
VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
or VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03916
If srcAccessMask includes VK_ACCESS_2_HOST_READ_BIT,
srcStageMask must include VK_PIPELINE_STAGE_2_HOST_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03917
If srcAccessMask includes VK_ACCESS_2_HOST_WRITE_BIT,
srcStageMask must include VK_PIPELINE_STAGE_2_HOST_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03918
If srcAccessMask includes
VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03919
If srcAccessMask includes
VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03920
If srcAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-04747
If srcAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT,
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03922
If srcAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03923
If srcAccessMask includes
VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV, srcStageMaskmust include VK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-04994
If srcAccessMask includes
VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI, srcStageMaskmust include VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI
VUID-VkBufferMemoryBarrier2-srcAccessMask-03924
If srcAccessMask includes
VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV, srcStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03925
If srcAccessMask includes
VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV, srcStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03926
If srcAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-03927
If srcAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR,
srcStageMask must include
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-srcAccessMask-03928
If srcAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR,
srcStageMask must include
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-srcAccessMask-06256
If
the rayQuery feature is not enabled and
srcAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR,
srcStageMask must not include any of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
except VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkBufferMemoryBarrier2-srcAccessMask-07272
If srcAccessMask includes
VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR,
srcStageMask must include
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT or
VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkBufferMemoryBarrier2-srcAccessMask-04858
If srcAccessMask includes
VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR, srcStageMask must
include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR
VUID-VkBufferMemoryBarrier2-srcAccessMask-04859
If srcAccessMask includes
VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR, srcStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR
VUID-VkBufferMemoryBarrier2-srcAccessMask-04860
If srcAccessMask includes
VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR, srcStageMask must
include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR
VUID-VkBufferMemoryBarrier2-srcAccessMask-04861
If srcAccessMask includes
VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR, srcStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR
VUID-VkBufferMemoryBarrier2-srcAccessMask-07455
If srcAccessMask includes
VK_ACCESS_2_OPTICAL_FLOW_READ_BIT_NV, srcStageMask must
include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV
VUID-VkBufferMemoryBarrier2-srcAccessMask-07456
If srcAccessMask includes
VK_ACCESS_2_OPTICAL_FLOW_WRITE_BIT_NV, srcStageMask must
include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV
VUID-VkBufferMemoryBarrier2-srcAccessMask-07457
If srcAccessMask includes
VK_ACCESS_2_MICROMAP_WRITE_BIT_EXT, srcStageMask must
include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT
VUID-VkBufferMemoryBarrier2-srcAccessMask-07458
If srcAccessMask includes
VK_ACCESS_2_MICROMAP_READ_BIT_EXT, srcStageMask must
include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT or
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR
VUID-VkBufferMemoryBarrier2-srcAccessMask-08118
If srcAccessMask includes
VK_ACCESS_2_DESCRIPTOR_BUFFER_READ_BIT_EXT, srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-dstStageMask-03929
If the geometryShader feature is not
enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT
VUID-VkBufferMemoryBarrier2-dstStageMask-03930
If the tessellationShader feature
is not enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT or
VK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT
VUID-VkBufferMemoryBarrier2-dstStageMask-03931
If the conditionalRendering
feature is not enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT
VUID-VkBufferMemoryBarrier2-dstStageMask-03932
If the fragmentDensityMap feature
is not enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT
VUID-VkBufferMemoryBarrier2-dstStageMask-03933
If the transformFeedback feature
is not enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT
VUID-VkBufferMemoryBarrier2-dstStageMask-03934
If the meshShader feature is not enabled,
dstStageMask must not contain
VK_PIPELINE_STAGE_2_MESH_SHADER_BIT_EXT
VUID-VkBufferMemoryBarrier2-dstStageMask-03935
If the taskShader feature is not enabled,
dstStageMask must not contain
VK_PIPELINE_STAGE_2_TASK_SHADER_BIT_EXT
VUID-VkBufferMemoryBarrier2-dstStageMask-07316
If neither the shadingRateImage or
attachmentFragmentShadingRate are enabled, dstStageMaskmust not contain
VK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR
VUID-VkBufferMemoryBarrier2-dstStageMask-04957
If the subpassShading feature is not
enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI
VUID-VkBufferMemoryBarrier2-dstStageMask-04995
If the invocationMask feature is not
enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI
VUID-VkBufferMemoryBarrier2-dstStageMask-07946
If neither the VK_NV_ray_tracing extension or
rayTracingPipeline feature are
enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkBufferMemoryBarrier2-dstAccessMask-03900
If dstAccessMask includes
VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03901
If dstAccessMask includes VK_ACCESS_2_INDEX_READ_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03902
If dstAccessMask includes
VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT,
VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03903
If dstAccessMask includes
VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT,
VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03904
If dstAccessMask includes VK_ACCESS_2_UNIFORM_READ_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-dstAccessMask-03905
If dstAccessMask includes
VK_ACCESS_2_SHADER_SAMPLED_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-dstAccessMask-03906
If dstAccessMask includes
VK_ACCESS_2_SHADER_STORAGE_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-dstAccessMask-03907
If dstAccessMask includes
VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-dstAccessMask-07454
If dstAccessMask includes VK_ACCESS_2_SHADER_READ_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT,
or one of the VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-dstAccessMask-03909
If dstAccessMask includes VK_ACCESS_2_SHADER_WRITE_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-dstAccessMask-03910
If dstAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03911
If dstAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT, dstStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03912
If dstAccessMask includes
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03913
If dstAccessMask includes
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03914
If dstAccessMask includes VK_ACCESS_2_TRANSFER_READ_BIT,
dstStageMask must include VK_PIPELINE_STAGE_2_COPY_BIT,
VK_PIPELINE_STAGE_2_BLIT_BIT,
VK_PIPELINE_STAGE_2_RESOLVE_BIT,
VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03915
If dstAccessMask includes VK_ACCESS_2_TRANSFER_WRITE_BIT,
dstStageMask must include VK_PIPELINE_STAGE_2_COPY_BIT,
VK_PIPELINE_STAGE_2_BLIT_BIT,
VK_PIPELINE_STAGE_2_RESOLVE_BIT,
VK_PIPELINE_STAGE_2_CLEAR_BIT,
VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
or VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03916
If dstAccessMask includes VK_ACCESS_2_HOST_READ_BIT,
dstStageMask must include VK_PIPELINE_STAGE_2_HOST_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03917
If dstAccessMask includes VK_ACCESS_2_HOST_WRITE_BIT,
dstStageMask must include VK_PIPELINE_STAGE_2_HOST_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03918
If dstAccessMask includes
VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03919
If dstAccessMask includes
VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03920
If dstAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-04747
If dstAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT,
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03922
If dstAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03923
If dstAccessMask includes
VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV, dstStageMaskmust include VK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-04994
If dstAccessMask includes
VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI, dstStageMaskmust include VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI
VUID-VkBufferMemoryBarrier2-dstAccessMask-03924
If dstAccessMask includes
VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV, dstStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03925
If dstAccessMask includes
VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV, dstStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03926
If dstAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-03927
If dstAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR,
dstStageMask must include
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-dstAccessMask-03928
If dstAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR,
dstStageMask must include
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkBufferMemoryBarrier2-dstAccessMask-06256
If
the rayQuery feature is not enabled and
dstAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR,
dstStageMask must not include any of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
except VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkBufferMemoryBarrier2-dstAccessMask-07272
If dstAccessMask includes
VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR,
dstStageMask must include
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT or
VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkBufferMemoryBarrier2-dstAccessMask-04858
If dstAccessMask includes
VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR, dstStageMask must
include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR
VUID-VkBufferMemoryBarrier2-dstAccessMask-04859
If dstAccessMask includes
VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR, dstStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR
VUID-VkBufferMemoryBarrier2-dstAccessMask-04860
If dstAccessMask includes
VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR, dstStageMask must
include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR
VUID-VkBufferMemoryBarrier2-dstAccessMask-04861
If dstAccessMask includes
VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR, dstStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR
VUID-VkBufferMemoryBarrier2-dstAccessMask-07455
If dstAccessMask includes
VK_ACCESS_2_OPTICAL_FLOW_READ_BIT_NV, dstStageMask must
include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV
VUID-VkBufferMemoryBarrier2-dstAccessMask-07456
If dstAccessMask includes
VK_ACCESS_2_OPTICAL_FLOW_WRITE_BIT_NV, dstStageMask must
include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV
VUID-VkBufferMemoryBarrier2-dstAccessMask-07457
If dstAccessMask includes
VK_ACCESS_2_MICROMAP_WRITE_BIT_EXT, dstStageMask must
include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT
VUID-VkBufferMemoryBarrier2-dstAccessMask-07458
If dstAccessMask includes
VK_ACCESS_2_MICROMAP_READ_BIT_EXT, dstStageMask must
include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT or
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR
VUID-VkBufferMemoryBarrier2-dstAccessMask-08118
If dstAccessMask includes
VK_ACCESS_2_DESCRIPTOR_BUFFER_READ_BIT_EXT, dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkBufferMemoryBarrier2-offset-01187
offset must be less than the size of buffer
VUID-VkBufferMemoryBarrier2-size-01188
If size is not equal to VK_WHOLE_SIZE, size must be
greater than 0
VUID-VkBufferMemoryBarrier2-size-01189
If size is not equal to VK_WHOLE_SIZE, size must be
less than or equal to than the size of buffer minus offset
VUID-VkBufferMemoryBarrier2-buffer-01931
If buffer is non-sparse then it must be bound completely and
contiguously to a single VkDeviceMemory object
VUID-VkBufferMemoryBarrier2-buffer-09095
If buffer was created with a sharing mode of
VK_SHARING_MODE_EXCLUSIVE, and srcQueueFamilyIndex and
dstQueueFamilyIndex are not equal, srcQueueFamilyIndex must
be
VK_QUEUE_FAMILY_EXTERNAL,
VK_QUEUE_FAMILY_FOREIGN_EXT,
or
a valid queue family
VUID-VkBufferMemoryBarrier2-buffer-09096
If buffer was created with a sharing mode of
VK_SHARING_MODE_EXCLUSIVE, and srcQueueFamilyIndex and
dstQueueFamilyIndex are not equal, dstQueueFamilyIndex must
be
VK_QUEUE_FAMILY_EXTERNAL,
VK_QUEUE_FAMILY_FOREIGN_EXT,
or
a valid queue family
VUID-VkBufferMemoryBarrier2-srcQueueFamilyIndex-04087
If srcQueueFamilyIndex is not equal to dstQueueFamilyIndex,
at least one of srcQueueFamilyIndex or dstQueueFamilyIndexmust not be VK_QUEUE_FAMILY_EXTERNAL
or VK_QUEUE_FAMILY_FOREIGN_EXT
VUID-VkBufferMemoryBarrier2-None-09097
If
the VK_KHR_external_memory extension is not enabled,
srcQueueFamilyIndex must not be VK_QUEUE_FAMILY_EXTERNAL
VUID-VkBufferMemoryBarrier2-None-09098
If
the VK_KHR_external_memory extension is not enabled,
dstQueueFamilyIndex must not be VK_QUEUE_FAMILY_EXTERNAL
VUID-VkBufferMemoryBarrier2-srcQueueFamilyIndex-09099
If the VK_EXT_queue_family_foreign extension is not enabled
srcQueueFamilyIndex must not be VK_QUEUE_FAMILY_FOREIGN_EXT
VUID-VkBufferMemoryBarrier2-dstQueueFamilyIndex-09100
If the VK_EXT_queue_family_foreign extension is not enabled
dstQueueFamilyIndex must not be VK_QUEUE_FAMILY_FOREIGN_EXT
VUID-VkBufferMemoryBarrier2-srcStageMask-03851
If either srcStageMask or dstStageMask includes
VK_PIPELINE_STAGE_2_HOST_BIT, srcQueueFamilyIndex and
dstQueueFamilyIndex must be equal
Valid Usage (Implicit)
VUID-VkBufferMemoryBarrier2-sType-sType
sType must be VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER_2
VUID-VkBufferMemoryBarrier2-pNext-pNext
pNext must be NULL or a pointer to a valid instance of VkExternalMemoryAcquireUnmodifiedEXT
VUID-VkBufferMemoryBarrier2-sType-unique
The sType value of each struct in the pNext chain must be unique
VUID-VkBufferMemoryBarrier2-srcStageMask-parameter
srcStageMask must be a valid combination of VkPipelineStageFlagBits2 values
VUID-VkBufferMemoryBarrier2-srcAccessMask-parameter
srcAccessMask must be a valid combination of VkAccessFlagBits2 values
VUID-VkBufferMemoryBarrier2-dstStageMask-parameter
dstStageMask must be a valid combination of VkPipelineStageFlagBits2 values
VUID-VkBufferMemoryBarrier2-dstAccessMask-parameter
dstAccessMask must be a valid combination of VkAccessFlagBits2 values
VUID-VkBufferMemoryBarrier2-buffer-parameter
buffer must be a valid VkBuffer handle