VkMemoryRangeBarrierKHR
The VkMemoryRangeBarrierKHR structure is defined as:
typedef struct VkMemoryRangeBarrierKHR {
VkStructureType sType;
const void* pNext;
VkPipelineStageFlags2 srcStageMask;
VkAccessFlags2 srcAccessMask;
VkPipelineStageFlags2 dstStageMask;
VkAccessFlags2 dstAccessMask;
uint32_t srcQueueFamilyIndex;
uint32_t dstQueueFamilyIndex;
VkDeviceAddressRangeKHR addressRange;
VkAddressCommandFlagsKHR addressFlags;
} VkMemoryRangeBarrierKHR;
pub struct MemoryRangeBarrierKHR {
s_type: vk::StructureType,
p_next: *const c_void,
src_stage_mask: vk::PipelineStageFlags2,
src_access_mask: vk::AccessFlags2,
dst_stage_mask: vk::PipelineStageFlags2,
dst_access_mask: vk::AccessFlags2,
src_queue_family_index: u32,
dst_queue_family_index: u32,
address_range: vk::DeviceAddressRangeKHR,
address_flags: vk::AddressCommandFlagsKHR,
}
sTypeis a VkStructureType value identifying this structure.pNextisNULLor a pointer to a structure extending this structure.srcStageMaskis a VkPipelineStageFlags2 mask of pipeline stages to be included in the first synchronization scope.srcAccessMaskis a VkAccessFlags2 mask of access flags to be included in the first access scope.dstStageMaskis a VkPipelineStageFlags2 mask of pipeline stages to be included in the second synchronization scope.dstAccessMaskis a VkAccessFlags2 mask of access flags to be included in the second access scope.srcQueueFamilyIndexis the source queue family for a queue family ownership transfer.dstQueueFamilyIndexis the destination queue family for a queue family ownership transfer.addressRangeis a VkDeviceAddressRangeKHR structure specifying the address range affected by the barrier.addressFlagsis a VkAddressCommandFlagsKHR value defining the flags for the address range.
This structure defines a memory dependency limited to an address range, and can define a queue family ownership transfer operation for that range.
The first synchronization scope and
access scope described by
this structure include only operations and memory accesses specified by
srcStageMask and srcAccessMask.
The second synchronization scope
and access scope described
by this structure include only operations and memory accesses specified by
dstStageMask and dstAccessMask.
Both access scopes are
limited to only memory accesses to memory in addressRange.
If the buffer from which address was queried was created with a
sharing mode of VK_SHARING_MODE_EXCLUSIVE, and
srcQueueFamilyIndex is not equal to dstQueueFamilyIndex, this
memory range barrier defines a queue
family ownership transfer operation.
When executed on a queue in the family identified by
srcQueueFamilyIndex, this barrier defines a
queue family release operation
for the specified address range, and the second synchronization scope does
not apply to this operation.
When executed on a queue in the family identified by
dstQueueFamilyIndex, this barrier defines a
queue family acquire operation
for the specified address range, and the first synchronization scope does
not apply to this operation.
A queue family ownership transfer
operation is also defined if the values are not equal, and either is one
of the special queue family values reserved for external memory ownership
transfers, as described in Queue Family Ownership Transfer.
A queue family release
operation is defined when dstQueueFamilyIndex is one of those
values, and a queue family
acquire operation is defined when srcQueueFamilyIndex is one of
those values.
Valid Usage
VUID-VkMemoryRangeBarrierKHR-addressRange-13097
If the range specified by addressRange is not bound completely
to memory when accessed, addressFlags must not include
VK_ADDRESS_COMMAND_FULLY_BOUND_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-addressRange-13098
If the buffer from which the range specified by addressRange was
created with VK_BUFFER_CREATE_PROTECTED_BIT, and
protectedNoFault is not supported,
addressFlags must include
VK_ADDRESS_COMMAND_PROTECTED_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-addressRange-13099
If the buffer from which the range specified by addressRange was
created without VK_BUFFER_CREATE_PROTECTED_BIT, and
protectedNoFault is not supported,
addressFlags must not include
VK_ADDRESS_COMMAND_PROTECTED_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-addressFlags-13100
addressFlags must not include both
VK_ADDRESS_COMMAND_STORAGE_BUFFER_USAGE_BIT_KHR and
VK_ADDRESS_COMMAND_UNKNOWN_STORAGE_BUFFER_USAGE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-addressRange-13122
If any buffer, which is bound to a range of VkDeviceMemory that
overlaps the range backing addressRange, was created with
VK_BUFFER_USAGE_STORAGE_BUFFER_BIT, addressFlags must
include VK_ADDRESS_COMMAND_STORAGE_BUFFER_USAGE_BIT_KHR or
VK_ADDRESS_COMMAND_UNKNOWN_STORAGE_BUFFER_USAGE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-addressRange-13123
If any buffer, which is bound to a range of VkDeviceMemory that
overlaps the range backing addressRange, was created without
VK_BUFFER_USAGE_STORAGE_BUFFER_BIT, addressFlags must not
include VK_ADDRESS_COMMAND_STORAGE_BUFFER_USAGE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-addressFlags-13101
addressFlags must not include both
VK_ADDRESS_COMMAND_TRANSFORM_FEEDBACK_BUFFER_USAGE_BIT_KHR and
VK_ADDRESS_COMMAND_UNKNOWN_TRANSFORM_FEEDBACK_BUFFER_USAGE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-addressRange-13124
If any buffer, which is bound to a range of VkDeviceMemory that
overlaps the range backing addressRange, was created with
VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT,
addressFlags must include
VK_ADDRESS_COMMAND_TRANSFORM_FEEDBACK_BUFFER_USAGE_BIT_KHR or
VK_ADDRESS_COMMAND_UNKNOWN_TRANSFORM_FEEDBACK_BUFFER_USAGE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-addressRange-13125
If any buffer, which is bound to a range of VkDeviceMemory that
overlaps the range backing addressRange, was created without
VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT,
addressFlags must not include
VK_ADDRESS_COMMAND_TRANSFORM_FEEDBACK_BUFFER_USAGE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03929
If the geometryShader feature is not
enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03930
If the tessellationShader feature
is not enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT or
VK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03931
If the conditionalRendering
feature is not enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03932
If the fragmentDensityMap feature
is not enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03933
If the transformFeedback feature
is not enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03934
If the meshShader feature is not enabled,
srcStageMask must not contain
VK_PIPELINE_STAGE_2_MESH_SHADER_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-srcStageMask-03935
If the taskShader feature is not enabled,
srcStageMask must not contain
VK_PIPELINE_STAGE_2_TASK_SHADER_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-srcStageMask-07316
If neither of the shadingRateImage
or the attachmentFragmentShadingRate features are enabled,
srcStageMask must not contain
VK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcStageMask-04957
If the subpassShading feature is not
enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI
VUID-VkMemoryRangeBarrierKHR-srcStageMask-04995
If the invocationMask feature is not
enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI
VUID-VkMemoryRangeBarrierKHR-srcStageMask-07946
If neither the VK_NV_ray_tracing extension or the
rayTracingPipeline feature are
enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcStageMask-10751
If the accelerationStructure
feature is not enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcStageMask-10752
If the rayTracingMaintenance1
feature is not enabled, srcStageMask must not contain
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcStageMask-10753
If the micromap feature is not enabled,
srcStageMask must not contain
VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03900
If srcAccessMask includes
VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_COPY_INDIRECT_BIT_KHR,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03901
If srcAccessMask includes VK_ACCESS_2_INDEX_READ_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03902
If srcAccessMask includes
VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT,
VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03903
If srcAccessMask includes
VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT,
VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03904
If srcAccessMask includes VK_ACCESS_2_UNIFORM_READ_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03905
If srcAccessMask includes
VK_ACCESS_2_SHADER_SAMPLED_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03906
If srcAccessMask includes
VK_ACCESS_2_SHADER_STORAGE_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03907
If srcAccessMask includes
VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07454
If srcAccessMask includes VK_ACCESS_2_SHADER_READ_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT,
or one of the VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03909
If srcAccessMask includes VK_ACCESS_2_SHADER_WRITE_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03910
If srcAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT, srcStageMask must
include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03911
If srcAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT, srcStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03912
If srcAccessMask includes
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03913
If srcAccessMask includes
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,
srcStageMask must include
VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03914
If srcAccessMask includes VK_ACCESS_2_TRANSFER_READ_BIT,
srcStageMask must include VK_PIPELINE_STAGE_2_COPY_BIT,
VK_PIPELINE_STAGE_2_BLIT_BIT,
VK_PIPELINE_STAGE_2_RESOLVE_BIT,
VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_CONVERT_COOPERATIVE_VECTOR_MATRIX_BIT_NV,
or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03915
If srcAccessMask includes VK_ACCESS_2_TRANSFER_WRITE_BIT,
srcStageMask must include VK_PIPELINE_STAGE_2_COPY_BIT,
VK_PIPELINE_STAGE_2_BLIT_BIT,
VK_PIPELINE_STAGE_2_RESOLVE_BIT,
VK_PIPELINE_STAGE_2_CLEAR_BIT,
VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_CONVERT_COOPERATIVE_VECTOR_MATRIX_BIT_NV,
or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03916
If srcAccessMask includes VK_ACCESS_2_HOST_READ_BIT,
srcStageMask must include VK_PIPELINE_STAGE_2_HOST_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03917
If srcAccessMask includes VK_ACCESS_2_HOST_WRITE_BIT,
srcStageMask must include VK_PIPELINE_STAGE_2_HOST_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03918
If srcAccessMask includes
VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03919
If srcAccessMask includes
VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03920
If srcAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04747
If srcAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT,
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03922
If srcAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03923
If srcAccessMask includes
VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV, srcStageMaskmust include VK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04994
If srcAccessMask includes
VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI, srcStageMaskmust include VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03924
If srcAccessMask includes
VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV, srcStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03925
If srcAccessMask includes
VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV, srcStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03926
If srcAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03927
If srcAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR,
srcStageMask must include
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-03928
If srcAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR,
srcStageMask must include
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-06256
If
the rayQuery feature is not enabled and
srcAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR,
srcStageMask must not include any of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
except VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07272
If srcAccessMask includes
VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR,
srcStageMask must include
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT or
VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04858
If srcAccessMask includes
VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR, srcStageMask must
include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04859
If srcAccessMask includes
VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR, srcStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04860
If srcAccessMask includes
VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR, srcStageMask must
include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-04861
If srcAccessMask includes
VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR, srcStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07455
If srcAccessMask includes
VK_ACCESS_2_OPTICAL_FLOW_READ_BIT_NV, srcStageMask must
include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07456
If srcAccessMask includes
VK_ACCESS_2_OPTICAL_FLOW_WRITE_BIT_NV, srcStageMask must
include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07457
If srcAccessMask includes
VK_ACCESS_2_MICROMAP_WRITE_BIT_EXT, srcStageMask must
include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-07458
If srcAccessMask includes
VK_ACCESS_2_MICROMAP_READ_BIT_EXT, srcStageMask must
include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT or
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-08118
If srcAccessMask includes
VK_ACCESS_2_DESCRIPTOR_BUFFER_READ_BIT_EXT, srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-10670
If srcAccessMask includes
VK_ACCESS_2_SHADER_TILE_ATTACHMENT_READ_BIT_QCOM,
srcStageMask must include
VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT or
VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-10671
If srcAccessMask includes
VK_ACCESS_2_SHADER_TILE_ATTACHMENT_WRITE_BIT_QCOM,
srcStageMask must include
VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT or
VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-11771
If srcAccessMask includes
VK_ACCESS_2_MEMORY_DECOMPRESSION_READ_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_MEMORY_DECOMPRESSION_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-11772
If srcAccessMask includes
VK_ACCESS_2_MEMORY_DECOMPRESSION_WRITE_BIT_EXT,
srcStageMask must include
VK_PIPELINE_STAGE_2_MEMORY_DECOMPRESSION_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-11294
If srcAccessMask includes
VK_ACCESS_2_SAMPLER_HEAP_READ_BIT_EXT or
VK_ACCESS_2_RESOURCE_HEAP_READ_BIT_EXT, srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03929
If the geometryShader feature is not
enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03930
If the tessellationShader feature
is not enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT or
VK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03931
If the conditionalRendering
feature is not enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03932
If the fragmentDensityMap feature
is not enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03933
If the transformFeedback feature
is not enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03934
If the meshShader feature is not enabled,
dstStageMask must not contain
VK_PIPELINE_STAGE_2_MESH_SHADER_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-dstStageMask-03935
If the taskShader feature is not enabled,
dstStageMask must not contain
VK_PIPELINE_STAGE_2_TASK_SHADER_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-dstStageMask-07316
If neither of the shadingRateImage
or the attachmentFragmentShadingRate features are enabled,
dstStageMask must not contain
VK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstStageMask-04957
If the subpassShading feature is not
enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI
VUID-VkMemoryRangeBarrierKHR-dstStageMask-04995
If the invocationMask feature is not
enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI
VUID-VkMemoryRangeBarrierKHR-dstStageMask-07946
If neither the VK_NV_ray_tracing extension or the
rayTracingPipeline feature are
enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstStageMask-10751
If the accelerationStructure
feature is not enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstStageMask-10752
If the rayTracingMaintenance1
feature is not enabled, dstStageMask must not contain
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstStageMask-10753
If the micromap feature is not enabled,
dstStageMask must not contain
VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03900
If dstAccessMask includes
VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_COPY_INDIRECT_BIT_KHR,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03901
If dstAccessMask includes VK_ACCESS_2_INDEX_READ_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03902
If dstAccessMask includes
VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT,
VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03903
If dstAccessMask includes
VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT,
VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03904
If dstAccessMask includes VK_ACCESS_2_UNIFORM_READ_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03905
If dstAccessMask includes
VK_ACCESS_2_SHADER_SAMPLED_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03906
If dstAccessMask includes
VK_ACCESS_2_SHADER_STORAGE_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03907
If dstAccessMask includes
VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07454
If dstAccessMask includes VK_ACCESS_2_SHADER_READ_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT,
or one of the VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03909
If dstAccessMask includes VK_ACCESS_2_SHADER_WRITE_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03910
If dstAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT, dstStageMask must
include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03911
If dstAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT, dstStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03912
If dstAccessMask includes
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03913
If dstAccessMask includes
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,
dstStageMask must include
VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03914
If dstAccessMask includes VK_ACCESS_2_TRANSFER_READ_BIT,
dstStageMask must include VK_PIPELINE_STAGE_2_COPY_BIT,
VK_PIPELINE_STAGE_2_BLIT_BIT,
VK_PIPELINE_STAGE_2_RESOLVE_BIT,
VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_CONVERT_COOPERATIVE_VECTOR_MATRIX_BIT_NV,
or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03915
If dstAccessMask includes VK_ACCESS_2_TRANSFER_WRITE_BIT,
dstStageMask must include VK_PIPELINE_STAGE_2_COPY_BIT,
VK_PIPELINE_STAGE_2_BLIT_BIT,
VK_PIPELINE_STAGE_2_RESOLVE_BIT,
VK_PIPELINE_STAGE_2_CLEAR_BIT,
VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_CONVERT_COOPERATIVE_VECTOR_MATRIX_BIT_NV,
or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03916
If dstAccessMask includes VK_ACCESS_2_HOST_READ_BIT,
dstStageMask must include VK_PIPELINE_STAGE_2_HOST_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03917
If dstAccessMask includes VK_ACCESS_2_HOST_WRITE_BIT,
dstStageMask must include VK_PIPELINE_STAGE_2_HOST_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03918
If dstAccessMask includes
VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03919
If dstAccessMask includes
VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03920
If dstAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04747
If dstAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT,
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03922
If dstAccessMask includes
VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03923
If dstAccessMask includes
VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV, dstStageMaskmust include VK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV,
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04994
If dstAccessMask includes
VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI, dstStageMaskmust include VK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03924
If dstAccessMask includes
VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV, dstStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03925
If dstAccessMask includes
VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV, dstStageMaskmust include VK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03926
If dstAccessMask includes
VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03927
If dstAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR,
dstStageMask must include
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-03928
If dstAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR,
dstStageMask must include
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY_BIT_KHR,
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-06256
If
the rayQuery feature is not enabled and
dstAccessMask includes
VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR,
dstStageMask must not include any of the
VK_PIPELINE_STAGE_*_SHADER_BIT stages
except VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07272
If dstAccessMask includes
VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR,
dstStageMask must include
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT or
VK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04858
If dstAccessMask includes
VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR, dstStageMask must
include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04859
If dstAccessMask includes
VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR, dstStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04860
If dstAccessMask includes
VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR, dstStageMask must
include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-04861
If dstAccessMask includes
VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR, dstStageMaskmust include VK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07455
If dstAccessMask includes
VK_ACCESS_2_OPTICAL_FLOW_READ_BIT_NV, dstStageMask must
include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07456
If dstAccessMask includes
VK_ACCESS_2_OPTICAL_FLOW_WRITE_BIT_NV, dstStageMask must
include VK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NV
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07457
If dstAccessMask includes
VK_ACCESS_2_MICROMAP_WRITE_BIT_EXT, dstStageMask must
include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-07458
If dstAccessMask includes
VK_ACCESS_2_MICROMAP_READ_BIT_EXT, dstStageMask must
include VK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT or
VK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-08118
If dstAccessMask includes
VK_ACCESS_2_DESCRIPTOR_BUFFER_READ_BIT_EXT, dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-10670
If dstAccessMask includes
VK_ACCESS_2_SHADER_TILE_ATTACHMENT_READ_BIT_QCOM,
dstStageMask must include
VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT or
VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-10671
If dstAccessMask includes
VK_ACCESS_2_SHADER_TILE_ATTACHMENT_WRITE_BIT_QCOM,
dstStageMask must include
VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT or
VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-11771
If dstAccessMask includes
VK_ACCESS_2_MEMORY_DECOMPRESSION_READ_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_MEMORY_DECOMPRESSION_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-11772
If dstAccessMask includes
VK_ACCESS_2_MEMORY_DECOMPRESSION_WRITE_BIT_EXT,
dstStageMask must include
VK_PIPELINE_STAGE_2_MEMORY_DECOMPRESSION_BIT_EXT
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-11294
If dstAccessMask includes
VK_ACCESS_2_SAMPLER_HEAP_READ_BIT_EXT or
VK_ACCESS_2_RESOURCE_HEAP_READ_BIT_EXT, dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT,
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of
VK_PIPELINE_STAGE_*_SHADER_BIT stages
VUID-VkMemoryRangeBarrierKHR-None-09097
If the VK_KHR_external_memory extension is not enabled,
and the value of VkApplicationInfo::apiVersion used to create the VkInstance is not greater than or equal to Version 1.1, srcQueueFamilyIndex must not be VK_QUEUE_FAMILY_EXTERNAL
VUID-VkMemoryRangeBarrierKHR-None-09098
If the VK_KHR_external_memory extension is not enabled,
and the value of VkApplicationInfo::apiVersion used to create the VkInstance is not greater than or equal to Version 1.1, dstQueueFamilyIndex must not be VK_QUEUE_FAMILY_EXTERNAL
VUID-VkMemoryRangeBarrierKHR-srcQueueFamilyIndex-09099
If the VK_EXT_queue_family_foreign extension is not enabled
srcQueueFamilyIndex must not be VK_QUEUE_FAMILY_FOREIGN_EXT
VUID-VkMemoryRangeBarrierKHR-dstQueueFamilyIndex-09100
If the VK_EXT_queue_family_foreign extension is not enabled
dstQueueFamilyIndex must not be VK_QUEUE_FAMILY_FOREIGN_EXT
VUID-VkMemoryRangeBarrierKHR-address-13087
If the buffer from which address was queried was created with a
sharing mode of VK_SHARING_MODE_EXCLUSIVE, and
srcQueueFamilyIndex and dstQueueFamilyIndex are not equal,
srcQueueFamilyIndex must be
VK_QUEUE_FAMILY_EXTERNAL,
VK_QUEUE_FAMILY_FOREIGN_EXT,
or
a valid queue family
VUID-VkMemoryRangeBarrierKHR-address-13088
If the buffer from which address was queried was created with a
sharing mode of VK_SHARING_MODE_EXCLUSIVE, and
srcQueueFamilyIndex and dstQueueFamilyIndex are not equal,
dstQueueFamilyIndex must be
VK_QUEUE_FAMILY_EXTERNAL,
VK_QUEUE_FAMILY_FOREIGN_EXT,
or
a valid queue family
VUID-VkMemoryRangeBarrierKHR-srcStageMask-13089
If either srcStageMask or dstStageMask includes
VK_PIPELINE_STAGE_2_HOST_BIT, srcQueueFamilyIndex and
dstQueueFamilyIndex must be equal
Valid Usage (Implicit)
VUID-VkMemoryRangeBarrierKHR-sType-sType
sType must be VK_STRUCTURE_TYPE_MEMORY_RANGE_BARRIER_KHR
VUID-VkMemoryRangeBarrierKHR-pNext-pNext
pNext must be NULL
VUID-VkMemoryRangeBarrierKHR-srcStageMask-parameter
srcStageMask must be a valid combination of VkPipelineStageFlagBits2 values
VUID-VkMemoryRangeBarrierKHR-srcAccessMask-parameter
srcAccessMask must be a valid combination of VkAccessFlagBits2 values
VUID-VkMemoryRangeBarrierKHR-dstStageMask-parameter
dstStageMask must be a valid combination of VkPipelineStageFlagBits2 values
VUID-VkMemoryRangeBarrierKHR-dstAccessMask-parameter
dstAccessMask must be a valid combination of VkAccessFlagBits2 values
VUID-VkMemoryRangeBarrierKHR-addressFlags-parameter
addressFlags must be a valid combination of VkAddressCommandFlagBitsKHR values